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HardFault Handler

Definition

The ARM Cortex-M exception handler invoked when the processor detects a fatal error — illegal memory access, divide by zero, undefined instruction, or bus fault. The default implementation is an infinite loop (while(1){}) that provides zero diagnostic information.

Why it matters

A proper hardfault handler extracts the program counter, link register, and fault status registers (CFSR/HFSR/MMFAR/BFAR) so you know exactly what instruction caused the crash and why.

Relevant MCU families

STM32nRF52NXP i.MX RTMicrochip SAMRenesas RA

Related problems

HardFault Debugging
The default hardfault handler is while(1). It tells you nothing. Reading the fault status registers gives you the exact instruction, memory address, and fault type.

Other terms

Stack WatermarkingMISRA CDirect Memory Access (DMA)

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